EP2AGX260FF35I3G vs EP2AGX190FF35I3G Comparaison
Comparaison détaillée côte à côte de EP2AGX260FF35I3G par Intel et EP2AGX190FF35I3G par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP2AGX260FF35I3G - Arria II GX FPGA, 244K LE, 1152-FBGA | Intel
EP2AGX260FF35I3G ⚠ Dernier achatAltera
EP2AGX190FF35I3G - Arria II GX FPGA 190K LE | Intel | Altera
EP2AGX190FF35I3G ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP2AGX260FF35I3G | EP2AGX190FF35I3G |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 985,00 | $1 840,00 |
| Device Family | Arria II GX | — |
| Logic Elements | 244188 | — |
| Embedded Memory Bits | 12038144 | — |
| Maximum User I/O | 612 | — |
| Boîtier | 1152-BBGA, FCBGA | 1152-ball FC-FBGA (FF35), 35 mm body |
| Process Technology | 40 nm | — |
| Core Supply Voltage | 0.9 V | — |
| Speed Grade | I3 | 3 |
| Température de fonctionnement | -40 C to +100 C (Industrial) | -40 °C to +100 °C (industrial, suffix I) |
| Type de montage | Surface Mount | Surface Mount (flip-chip BGA) |
| Configuration | JTAG / Active Serial / Passive Serial / FPP | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Transceivers | [DATA_NEEDED: number of transceiver channels] | 8 high-speed transceiver channels (multi-gigabit) |
| Lead-Free (RoHS) | Yes (G suffix indicates Pb-free finish) | — |
| Tray Standard Quantity | [DATA_NEEDED: tray qty] | — |
| Family | — | Arria II GX |
| Logic Elements (LE) | — | 181,165 |
| Adaptive Logic Modules (ALM) | — | [DATA_NEEDED: ALM count] |
| User I/O Pins | — | 612 |
| Embedded Memory (bits) | — | 10,177,536 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Embedded Multipliers | — | [DATA_NEEDED: 18x18 multiplier count] |
| PLLs | — | [DATA_NEEDED: PLL count] |
| Core Voltage | — | 0.9 V |
| I/O Voltage Standards | — | 1.2 V to 3.3 V (LVTTL, LVCMOS, LVDS, HSTL, SSTL) |
| Process Node | — | 40 nm |
| Ball Pitch | — | [DATA_NEEDED: 1.0 mm (typical for FF35)] |
| Statut RoHS | — | Compliant (suffix G) |
| Lead-Free | — | Yes |
| Programming Toolchain | — | Quartus II / Quartus Prime |