EP2AGX260FF35I3G vs EP2AGX190FF35I3G Comparación
Comparación detallada lado a lado de EP2AGX260FF35I3G por Intel y EP2AGX190FF35I3G por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP2AGX260FF35I3G - Arria II GX FPGA, 244K LE, 1152-FBGA | Intel
EP2AGX260FF35I3G ⚠ Última compraAltera
EP2AGX190FF35I3G - Arria II GX FPGA 190K LE | Intel | Altera
EP2AGX190FF35I3G ⚠ Última compraComparación de especificaciones
| Parámetro | EP2AGX260FF35I3G | EP2AGX190FF35I3G |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Última compra |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $1.985,00 | $1.840,00 |
| Device Family | Arria II GX | — |
| Logic Elements | 244188 | — |
| Embedded Memory Bits | 12038144 | — |
| Maximum User I/O | 612 | — |
| Encapsulado | 1152-BBGA, FCBGA | 1152-ball FC-FBGA (FF35), 35 mm body |
| Process Technology | 40 nm | — |
| Core Supply Voltage | 0.9 V | — |
| Speed Grade | I3 | 3 |
| Temperatura de funcionamiento | -40 C to +100 C (Industrial) | -40 °C to +100 °C (industrial, suffix I) |
| Tipo de montaje | Surface Mount | Surface Mount (flip-chip BGA) |
| Configuration | JTAG / Active Serial / Passive Serial / FPP | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Transceivers | [DATA_NEEDED: number of transceiver channels] | 8 high-speed transceiver channels (multi-gigabit) |
| Lead-Free (RoHS) | Yes (G suffix indicates Pb-free finish) | — |
| Tray Standard Quantity | [DATA_NEEDED: tray qty] | — |
| Family | — | Arria II GX |
| Logic Elements (LE) | — | 181,165 |
| Adaptive Logic Modules (ALM) | — | [DATA_NEEDED: ALM count] |
| User I/O Pins | — | 612 |
| Embedded Memory (bits) | — | 10,177,536 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Embedded Multipliers | — | [DATA_NEEDED: 18x18 multiplier count] |
| PLLs | — | [DATA_NEEDED: PLL count] |
| Core Voltage | — | 0.9 V |
| I/O Voltage Standards | — | 1.2 V to 3.3 V (LVTTL, LVCMOS, LVDS, HSTL, SSTL) |
| Process Node | — | 40 nm |
| Ball Pitch | — | [DATA_NEEDED: 1.0 mm (typical for FF35)] |
| Estado RoHS | — | Compliant (suffix G) |
| Lead-Free | — | Yes |
| Programming Toolchain | — | Quartus II / Quartus Prime |