EP2AGZ225FF35C3G vs EP2AGZ350FF35C3G Comparison
Detailed side-by-side comparison of EP2AGZ225FF35C3G by Altera and EP2AGZ350FF35C3G by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP2AGZ225FF35C3G | EP2AGZ350FF35C3G |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $868.40 | $2,680.00 |
| Family | Arria II GZ | Arria II GZ |
| Series | Arria II | β |
| Logic Elements (LE) | 225,000 | 350,000 |
| Package | 1152-ball Flip-Chip BGA (FF35) | 1152-FBGA (35 mm x 35 mm, 1.0 mm pitch) |
| Package Size | 35 mm x 35 mm | β |
| Operating Temperature | 0C to +85C (Commercial) | 0C to +85C (commercial) |
| Speed Grade | C3 | β |
| Transceivers | Up to 16 channels | 8 |
| Transceiver Data Rate (max) | 6.375 Gbps | β |
| DSP Blocks | [DATA_NEEDED: count] | β |
| Embedded Memory | [DATA_NEEDED: Mbits] | 16,860 Kbits |
| User I/O Banks | [DATA_NEEDED: count] | β |
| Maximum User I/O | [DATA_NEEDED: pin count] | β |
| Process Technology | 40 nm TSMC | β |
| Memory Controller Support | DDR3, DDR2, QDR II+ | β |
| PCI Express Hard IP | Yes (Gen1/Gen2) | β |
| RoHS Status | Compliant | Compliant |
| Mounting Type | Surface Mount (BGA) | Surface Mount (BGA) |
| MSL Level | 3 (per JEDEC J-STD-020) | β |
| Lead-Free | Yes | β |
| DSP Blocks (18x18 Multipliers) | β | 224 |
| Transceiver Data Rate | β | up to 6.375 Gbps |
| User I/O Pins | β | 554 |
| PLLs | β | 8 |
| Hard Memory Controllers | β | 2 |
| Memory Interface Support | β | DDR3, DDR2, QDR II+, RLDRAM II |
| Maximum Memory Clock | β | 800 MHz |
| Process Node | β | 40 nm TSMC |
| Core Voltage | β | 0.9 V |
| Configuration Modes | β | Passive Serial, Fast Passive Parallel, JTAG, AS |