EP2AGZ225FF35C3G vs EP2AGZ350FF35C3G Comparaison
Comparaison détaillée côte à côte de EP2AGZ225FF35C3G par Altera et EP2AGZ350FF35C3G par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2AGZ225FF35C3G | EP2AGZ350FF35C3G |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $868,40 | $2 680,00 |
| Family | Arria II GZ | Arria II GZ |
| Series | Arria II | — |
| Logic Elements (LE) | 225,000 | 350,000 |
| Boîtier | 1152-ball Flip-Chip BGA (FF35) | 1152-FBGA (35 mm x 35 mm, 1.0 mm pitch) |
| Package Size | 35 mm x 35 mm | — |
| Température de fonctionnement | 0C to +85C (Commercial) | 0C to +85C (commercial) |
| Speed Grade | C3 | — |
| Transceivers | Up to 16 channels | 8 |
| Transceiver Data Rate (max) | 6.375 Gbps | — |
| DSP Blocks | [DATA_NEEDED: count] | — |
| Embedded Memory | [DATA_NEEDED: Mbits] | 16,860 Kbits |
| User I/O Banks | [DATA_NEEDED: count] | — |
| Maximum User I/O | [DATA_NEEDED: pin count] | — |
| Process Technology | 40 nm TSMC | — |
| Memory Controller Support | DDR3, DDR2, QDR II+ | — |
| PCI Express Hard IP | Yes (Gen1/Gen2) | — |
| Statut RoHS | Compliant | Compliant |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Niveau MSL | 3 (per JEDEC J-STD-020) | — |
| Lead-Free | Yes | — |
| DSP Blocks (18x18 Multipliers) | — | 224 |
| Transceiver Data Rate | — | up to 6.375 Gbps |
| User I/O Pins | — | 554 |
| PLLs | — | 8 |
| Hard Memory Controllers | — | 2 |
| Memory Interface Support | — | DDR3, DDR2, QDR II+, RLDRAM II |
| Maximum Memory Clock | — | 800 MHz |
| Process Node | — | 40 nm TSMC |
| Core Voltage | — | 0.9 V |
| Configuration Modes | — | Passive Serial, Fast Passive Parallel, JTAG, AS |