EP2AGZ300FF35I3G vs EP2AGX190FF35I3G Comparison
Detailed side-by-side comparison of EP2AGZ300FF35I3G by Intel and EP2AGX190FF35I3G by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP2AGX190FF35I3G - Arria II GX FPGA 190K LE | Intel | Altera
EP2AGX190FF35I3G β Last Time BuySpecification Comparison
| Parameter | EP2AGZ300FF35I3G | EP2AGX190FF35I3G |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,230.00 | $1,840.00 |
| Family | Arria II GZ | Arria II GX |
| Logic Elements (LE) | 300000 | 181,165 |
| Number of User I/O | 554 (maximum) | β |
| Number of Transceivers | 8 | β |
| Transceiver Data Rate | Up to 6.375 Gbps | β |
| Process Node | 40 nm | 40 nm |
| Operating Temperature | -40C to +100 C (I3 industrial) | -40 Β°C to +100 Β°C (industrial, suffix I) |
| Package | 1152-ball FBGA (FF35) | 1152-ball FC-FBGA (FF35), 35 mm body |
| Mounting Type | Surface Mount | Surface Mount (flip-chip BGA) |
| Supply Voltage | [DATA_NEEDED: core and I/O supply voltage values] | β |
| Embedded Memory (Mbits) | 16.4 | β |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks] | β |
| PLLs | [DATA_NEEDED: number of PLLs] | [DATA_NEEDED: PLL count] |
| Memory Interfaces | DDR3, QDRII+, RLDRAM II | β |
| Configuration Method | Serial, Parallel, JTAG | β |
| RoHS Status | Compliant | Compliant (suffix G) |
| MSL Level | 3 (168 hours) | β |
| Lead-Free | Yes | Yes |
| Adaptive Logic Modules (ALM) | β | [DATA_NEEDED: ALM count] |
| User I/O Pins | β | 612 |
| Embedded Memory (bits) | β | 10,177,536 |
| Number of I/O Banks | β | [DATA_NEEDED: number of I/O banks] |
| Transceivers | β | 8 high-speed transceiver channels (multi-gigabit) |
| Embedded Multipliers | β | [DATA_NEEDED: 18x18 multiplier count] |
| Core Voltage | β | 0.9 V |
| I/O Voltage Standards | β | 1.2 V to 3.3 V (LVTTL, LVCMOS, LVDS, HSTL, SSTL) |
| Speed Grade | β | 3 |
| Ball Pitch | β | [DATA_NEEDED: 1.0 mm (typical for FF35)] |
| Programming Toolchain | β | Quartus II / Quartus Prime |