EP2S60F1020I4N vs EP2S60F1020C4N Comparison

Detailed side-by-side comparison of EP2S60F1020I4N by Intel and EP2S60F1020C4N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP2S60F1020I4N EP2S60F1020C4N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $270.00 $67.00
Series Stratix II Stratix II
Family Stratix II FPGA Stratix II (EP2S60)
Logic Elements (LE) 60,440 β€”
Embedded Memory Bits 2,544,192 β€”
Maximum User I/O 718 β€”
Number of I/O Banks 32 β€”
DSP Blocks (18x18 multipliers) 36 β€”
PLLs 12 β€”
Core Voltage 1.2 V 1.2 V
Process Technology 90 nm CMOS 90 nm CMOS
Package 1020-ball FCBGA (33 x 33 mm) 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA)
Operating Temperature -40C to +100C (Industrial) β€”
Speed Grade -4 β€”
Configuration Scheme PS, PPS, PPA, FPP, JTAG β€”
Embedded Transceiver Channels 12 channels up to 6.375 Gbps β€”
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
RoHS Status unknown EU RoHS compliant with exemption (per Arrow listing)
Logic Elements β€” 60,440
Adaptive Logic Modules (ALMs) β€” 30,220 (approx.)
Logic Array Blocks (LABs) β€” 3,022
Embedded Memory (bits) β€” 2,544,192
Embedded Memory Blocks β€” M512/M4K/M-RAM TriMatrix memory
DSP Blocks (18-bit x 18-bit) β€” Up to 48 (24 per DSP block column pair typical)
User I/Os β€” 718
Maximum Core Frequency β€” 711.24 MHz (per Arrow listing)
Operating Temperature Grade β€” Commercial (C4 suffix indicates commercial, speed grade 4)
Configuration Modes β€” Passive Serial, Fast Passive Parallel, JTAG
PLLs / Clock Networks β€” Yes - on-chip PLLs and global clock networks

Datasheets & Resources

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