EP2S60F1020I4N vs EP2S60F1020C4N 比較

詳細並排比較 EP2S60F1020I4N 由 Intel 與 EP2S60F1020C4N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2S60F1020I4N EP2S60F1020C4N
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series Stratix II Stratix II
Family Stratix II FPGA Stratix II (EP2S60)
Logic Elements (LE) 60,440 —
Embedded Memory Bits 2,544,192 —
Maximum User I/O 718 —
Number of I/O Banks 32 —
DSP Blocks (18x18 multipliers) 36 —
PLLs 12 —
Core Voltage 1.2 V 1.2 V
Process Technology 90 nm CMOS 90 nm CMOS
封裝 1020-ball FCBGA (33 x 33 mm) 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA)
工作溫度 -40C to +100C (Industrial) —
Speed Grade -4 —
Configuration Scheme PS, PPS, PPA, FPP, JTAG —
Embedded Transceiver Channels 12 channels up to 6.375 Gbps —
安裝類型 Surface Mount (BGA) Surface Mount (BGA)
RoHS 狀態 unknown EU RoHS compliant with exemption (per Arrow listing)
Logic Elements — 60,440
Adaptive Logic Modules (ALMs) — 30,220 (approx.)
Logic Array Blocks (LABs) — 3,022
Embedded Memory (bits) — 2,544,192
Embedded Memory Blocks — M512/M4K/M-RAM TriMatrix memory
DSP Blocks (18-bit x 18-bit) — Up to 48 (24 per DSP block column pair typical)
User I/Os — 718
Maximum Core Frequency — 711.24 MHz (per Arrow listing)
Operating Temperature Grade — Commercial (C4 suffix indicates commercial, speed grade 4)
Configuration Modes — Passive Serial, Fast Passive Parallel, JTAG
PLLs / Clock Networks — Yes - on-chip PLLs and global clock networks

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