EP2SGX90FF1152 vs EP2SGX90EF1152I5N Comparison
Detailed side-by-side comparison of EP2SGX90FF1152 by Altera and EP2SGX90EF1152I5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP2SGX90FF1152 - 90K LE Stratix II GX FPGA, 1152-BGA | Altera
EP2SGX90FF1152 β Last Time BuyIntel
EP2SGX90EF1152I5N - 90k LEs Stratix II GX FPGA 1.2V FC-FBGA-1152 | Intel
EP2SGX90EF1152I5N ObsoleteSpecification Comparison
| Parameter | EP2SGX90FF1152 | EP2SGX90EF1152I5N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,425.00 | $1,320.00 |
| Series | Stratix II GX | EP2SGX90 |
| Family | FPGA | Stratix II GX |
| Logic Elements (LE) | 90,960 | β |
| Logic Array Blocks (LABs) | 4,548 | β |
| Embedded Memory (RAM bits) | 4,520,448 | β |
| User I/Os | 558 | β |
| Transceivers | Up to 20 channels | β |
| Transceiver Data Rate | Up to 6.375 Gbps | β |
| Core Voltage | 1.2 V | β |
| Process Node | 90 nm | β |
| Package | 1152-ball FC-FBGA (Flip-Chip) | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | Compliant | [DATA_NEEDED: RoHS status] |
| Lead-Free | Yes | β |
| Operating Temperature | [DATA_NEEDED: operating temperature grade] | β |
| Logic Elements (LEs) | β | 90,960 |
| Equivalent CLBs | β | 90,960 |
| Process Technology | β | 90 nm CMOS |
| Core Voltage (VCCINT) | β | 1.2 V |
| Maximum Clock Frequency | β | 609.76 MHz |
| Combinatorial Delay | β | 4.006 ns |
| Package Type | β | FC-FBGA (flip-chip fine-pitch BGA) |
| Number of Pins/Balls | β | 1152 |
| Package Code | β | BGA |
| Package Shape | β | SQUARE |
| Terminal Form | β | BALL |
| Operating Temperature Grade | β | INDUSTRIAL (I) |
| Embedded Transceivers | β | Yes (GX series, multi-gigabit PMA) |
| On-chip Block Memory | β | [DATA_NEEDED: total M512/M4K/M-RAM bits] |
| DSP Blocks | β | [DATA_NEEDED: number of DSP blocks] |
| User I/O Banks | β | [DATA_NEEDED: I/O bank count] |