EP610DC-30 vs EP610DC-20 Comparison
Detailed side-by-side comparison of EP610DC-30 by Altera and EP610DC-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610DC-30 | EP610DC-20 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.40 | $15.85 |
| Product Type | Classic EPLD (Erasable Programmable Logic Device) | CMOS UV-Erasable Programmable Logic Device (EPLD) |
| Family | EP610 (Classic Device Family) | Classic EP610 |
| Macrocells | 16 | β |
| Logic Expanders | 4 (4 product terms per macrocell) | β |
| Usable Gates | 300 | β |
| Maximum Pipelined Clock Frequency | 100 MHz | β |
| Propagation Delay (tPD) | 30 ns | 22 ns |
| Dedicated Inputs | 16 | 4 |
| I/O Pins | 16 (with output enable) | 16 (bidirectional) |
| Package | 24-pin CERDIP (windowed) | 24-pin Ceramic DIP (CDIP-24) with UV window |
| Mounting Type | Through-Hole | Through-hole |
| Speed Grade | -30 (30 ns tPD) | β |
| Technology | CMOS EPROM | β |
| Programmability | UV-erasable, windowed EPROM | β |
| Security Bit | Yes (protects design after programming) | β |
| Output Modes | Registered and Combinatorial | β |
| Operating Temperature | Commercial (0C to +70C) | 0 Β°C to 70 Β°C (commercial) |
| Logic Macrocells | β | 16 |
| Total Usable Pins | β | 20 |
| Product Terms (p-terms) | β | 160 |
| Maximum Toggle Frequency (fMAX) | β | 55.6 MHz |
| Supply Voltage (VCC) | β | 4.75 V to 5.25 V (5 V nominal) |
| Programming Method | β | UV erasure + parallel programmer |
| Process Technology | β | CMOS, UV-erasable floating gate |
| RoHS Status | β | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |