EP610DM-35 vs EP610DC-25 Comparison
Detailed side-by-side comparison of EP610DM-35 by Altera and EP610DC-25 by Rochester Electronics. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Rochester Electronics
EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester
EP610DC-25 ✓ ActiveSpecification Comparison
| Parameter | EP610DM-35 | EP610DC-25 |
|---|---|---|
| Brand | Altera | Rochester Electronics |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Active |
| Manufacturer | Altera (Rochester Electronics authorized stock) | — |
| Part Family | Classic EPLD | — |
| Logic Family | PAL-type EPLD, CMOS, UV-erasable | — |
| Number of Macrocells | 16 | — |
| Number of Gates | 300 | — |
| Propagation Delay (tPD) | 35 ns | — |
| Pipelined Data Rate (fMAX) | 100 MHz | — |
| Supply Voltage (VCC) | 5 V (single supply) | 4.75 V to 5.25 V (5 V nominal) |
| Package | 24-pin CDIP (CERDIP) with UV window | 24-pin CDIP (Ceramic DIP, through-hole) |
| Temperature Grade (M) | Military -55°C to +125°C | — |
| I/O Pins | 24 dedicated I/O (input + bidirectional) | — |
| Programmability | UV-erasable, reprogrammable | — |
| Operating Temperature Range | -55°C to +125°C | — |
| MSL Level | [DATA_NEEDED: MSL rating] | — |
| RoHS Status | Non-compliant (contains lead, hermetic CERDIP) | — |
| Family | — | Altera Classic EPLD |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocells | — | 16 |
| Equivalent Gates | — | 300 |
| Maximum Propagation Delay (tPD) | — | 25 ns |
| Pipelined Data Rate | — | Up to 100 MHz |
| Number of I/O Pins | — | 22 |
| Number of Dedicated Inputs | — | 4 |
| Total Pin Count | — | 24 |
| Mounting Type | — | Through Hole |
| Operating Temperature | — | 0 C to +70 C |
| Technology | — | CMOS EPROM (UV-erasable) |
| Programming Method | — | JEDEC fuse-map / UV-erase |
| Speed Grade Suffix | — | -25 (25 ns tPD) |