EP610DM-35 vs EP610DC-25 对比

详细并排对比 EP610DM-35 出自 Altera 和 EP610DC-25 出自 Rochester Electronics。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Rochester Electronics
EP610DC-25 EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester

EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester

EP610DC-25 ✓ 量产中

规格对比

参数 EP610DM-35 EP610DC-25
品牌 Altera Rochester Electronics
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 有效
库存状态 有库存 有库存
单价(USD) $23.40 $9.95
Manufacturer Altera (Rochester Electronics authorized stock) —
Part Family Classic EPLD —
Logic Family PAL-type EPLD, CMOS, UV-erasable —
Number of Macrocells 16 —
Number of Gates 300 —
Propagation Delay (tPD) 35 ns —
Pipelined Data Rate (fMAX) 100 MHz —
Supply Voltage (VCC) 5 V (single supply) 4.75 V to 5.25 V (5 V nominal)
封装 24-pin CDIP (CERDIP) with UV window 24-pin CDIP (Ceramic DIP, through-hole)
Temperature Grade (M) Military -55°C to +125°C —
I/O Pins 24 dedicated I/O (input + bidirectional) —
Programmability UV-erasable, reprogrammable —
工作温度范围 -55°C to +125°C —
MSL 等级 [DATA_NEEDED: MSL rating] —
RoHS 状态 Non-compliant (contains lead, hermetic CERDIP) —
Family — Altera Classic EPLD
Product Type — EPLD (Erasable Programmable Logic Device)
Macrocells — 16
Equivalent Gates — 300
Maximum Propagation Delay (tPD) — 25 ns
Pipelined Data Rate — Up to 100 MHz
Number of I/O Pins — 22
Number of Dedicated Inputs — 4
Total Pin Count — 24
安装类型 — Through Hole
工作温度 — 0 C to +70 C
Technology — CMOS EPROM (UV-erasable)
Programming Method — JEDEC fuse-map / UV-erase
Speed Grade Suffix — -25 (25 ns tPD)

数据手册与资源

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