EP610DM-35 vs EP610DC-25 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP610DM-35 sa pamamagitan ng Altera at EP610DC-25 sa pamamagitan ng Rochester Electronics. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Rochester Electronics
EP610DC-25 EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester

EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester

EP610DC-25 ✓ Nakahanda

Pagsanggunian na paghahambing

Parametro EP610DM-35 EP610DC-25
Brand Altera Rochester Electronics
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Aktibo
Manufacturer Altera (Rochester Electronics authorized stock) —
Part Family Classic EPLD —
Logic Family PAL-type EPLD, CMOS, UV-erasable —
Number of Macrocells 16 —
Number of Gates 300 —
Propagation Delay (tPD) 35 ns —
Pipelined Data Rate (fMAX) 100 MHz —
Supply Voltage (VCC) 5 V (single supply) 4.75 V to 5.25 V (5 V nominal)
Packhaging 24-pin CDIP (CERDIP) with UV window 24-pin CDIP (Ceramic DIP, through-hole)
Temperature Grade (M) Military -55°C to +125°C —
I/O Pins 24 dedicated I/O (input + bidirectional) —
Programmability UV-erasable, reprogrammable —
Hanay ng Temperature na Operasyon -55°C to +125°C —
Level ng MSL [DATA_NEEDED: MSL rating] —
Tindminan RoHS Non-compliant (contains lead, hermetic CERDIP) —
Family — Altera Classic EPLD
Product Type — EPLD (Erasable Programmable Logic Device)
Macrocells — 16
Equivalent Gates — 300
Maximum Propagation Delay (tPD) — 25 ns
Pipelined Data Rate — Up to 100 MHz
Number of I/O Pins — 22
Number of Dedicated Inputs — 4
Total Pin Count — 24
Uri ng Pagpapasok — Through Hole
Temperature na Operasyon — 0 C to +70 C
Technology — CMOS EPROM (UV-erasable)
Programming Method — JEDEC fuse-map / UV-erase
Speed Grade Suffix — -25 (25 ns tPD)

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