EP610LC-15 vs EP610DC-30 Comparison
Detailed side-by-side comparison of EP610LC-15 by Altera and EP610DC-30 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610LC-15 | EP610DC-30 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.65 | $10.40 |
| Product Type | Classic EPLD (Erasable Programmable Logic Device) | Classic EPLD (Erasable Programmable Logic Device) |
| Family | Altera Classic EPLD (EP610) | EP610 (Classic Device Family) |
| Logic Elements / Macrocells | 16 macrocells | β |
| Equivalent Gates | 300 gates | β |
| Propagation Delay (tpd) | 15 ns | β |
| Counter Frequency (fmax) | 83.3 MHz | β |
| Pipelined Data Rate | up to 100 MHz | β |
| Supply Voltage (Vcc) | 5 V (single supply) | β |
| Process Technology | CMOS | β |
| Package | 28-pin PLCC (J-lead, plastic OTP) | 24-pin CERDIP (windowed) |
| Mounting Type | Surface Mount | Through-Hole |
| Number of Pins | 28 | β |
| Operating Temperature | 0C to +70C (commercial) [DATA_NEEDED: full temperature grade] | Commercial (0C to +70C) |
| Programming | OTP (one-time programmable) | β |
| RoHS Status | unknown | β |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| Macrocells | β | 16 |
| Logic Expanders | β | 4 (4 product terms per macrocell) |
| Usable Gates | β | 300 |
| Maximum Pipelined Clock Frequency | β | 100 MHz |
| Propagation Delay (tPD) | β | 30 ns |
| Dedicated Inputs | β | 16 |
| I/O Pins | β | 16 (with output enable) |
| Speed Grade | β | -30 (30 ns tPD) |
| Technology | β | CMOS EPROM |
| Programmability | β | UV-erasable, windowed EPROM |
| Security Bit | β | Yes (protects design after programming) |
| Output Modes | β | Registered and Combinatorial |