EP610LC-15 vs EP610DC-30 비교
다음의 상세 나란히 비교: EP610LC-15 제조: Altera 및 EP610DC-30 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EP610LC-15 | EP610DC-30 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | NRND |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $4.65 | $10.40 |
| Product Type | Classic EPLD (Erasable Programmable Logic Device) | Classic EPLD (Erasable Programmable Logic Device) |
| Family | Altera Classic EPLD (EP610) | EP610 (Classic Device Family) |
| Logic Elements / Macrocells | 16 macrocells | — |
| Equivalent Gates | 300 gates | — |
| Propagation Delay (tpd) | 15 ns | — |
| Counter Frequency (fmax) | 83.3 MHz | — |
| Pipelined Data Rate | up to 100 MHz | — |
| Supply Voltage (Vcc) | 5 V (single supply) | — |
| Process Technology | CMOS | — |
| 패키지 | 28-pin PLCC (J-lead, plastic OTP) | 24-pin CERDIP (windowed) |
| 실장 유형 | Surface Mount | Through-Hole |
| 핀 수 | 28 | — |
| 동작 온도 | 0C to +70C (commercial) [DATA_NEEDED: full temperature grade] | Commercial (0C to +70C) |
| Programming | OTP (one-time programmable) | — |
| RoHS 상태 | unknown | — |
| MSL 레벨 | [DATA_NEEDED: MSL rating] | — |
| Macrocells | — | 16 |
| Logic Expanders | — | 4 (4 product terms per macrocell) |
| Usable Gates | — | 300 |
| Maximum Pipelined Clock Frequency | — | 100 MHz |
| Propagation Delay (tPD) | — | 30 ns |
| Dedicated Inputs | — | 16 |
| I/O Pins | — | 16 (with output enable) |
| Speed Grade | — | -30 (30 ns tPD) |
| Technology | — | CMOS EPROM |
| Programmability | — | UV-erasable, windowed EPROM |
| Security Bit | — | Yes (protects design after programming) |
| Output Modes | — | Registered and Combinatorial |