EP610LC-15 vs EP610DC-30 Perbandingan
Perbandingan bersamaan detil EP610LC-15 dari Altera dan EP610DC-30 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EP610LC-15 | EP610DC-30 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | NRND |
| Product Type | Classic EPLD (Erasable Programmable Logic Device) | Classic EPLD (Erasable Programmable Logic Device) |
| Family | Altera Classic EPLD (EP610) | EP610 (Classic Device Family) |
| Logic Elements / Macrocells | 16 macrocells | — |
| Equivalent Gates | 300 gates | — |
| Propagation Delay (tpd) | 15 ns | — |
| Counter Frequency (fmax) | 83.3 MHz | — |
| Pipelined Data Rate | up to 100 MHz | — |
| Supply Voltage (Vcc) | 5 V (single supply) | — |
| Process Technology | CMOS | — |
| Paket | 28-pin PLCC (J-lead, plastic OTP) | 24-pin CERDIP (windowed) |
| Tipe Mounting | Surface Mount | Through-Hole |
| Jumlah Pin | 28 | — |
| Suhu Kerja | 0C to +70C (commercial) [DATA_NEEDED: full temperature grade] | Commercial (0C to +70C) |
| Programming | OTP (one-time programmable) | — |
| Status RoHS | unknown | — |
| Level MSL | [DATA_NEEDED: MSL rating] | — |
| Macrocells | — | 16 |
| Logic Expanders | — | 4 (4 product terms per macrocell) |
| Usable Gates | — | 300 |
| Maximum Pipelined Clock Frequency | — | 100 MHz |
| Propagation Delay (tPD) | — | 30 ns |
| Dedicated Inputs | — | 16 |
| I/O Pins | — | 16 (with output enable) |
| Speed Grade | — | -30 (30 ns tPD) |
| Technology | — | CMOS EPROM |
| Programmability | — | UV-erasable, windowed EPROM |
| Security Bit | — | Yes (protects design after programming) |
| Output Modes | — | Registered and Combinatorial |