EP610LC-25 vs EP610PC25 Comparison
Detailed side-by-side comparison of EP610LC-25 by Intel and EP610PC25 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610LC-25 | EP610PC25 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EPLD | — |
| Macrocells | 16 | 16 |
| Logic Array Blocks (LABs) | 4 | — |
| Propagation Delay (tPD) | 25 ns | 25 ns |
| Maximum Toggle Frequency | 100 MHz | — |
| Pipelined Data Rate | Up to 100 MHz | Up to 100 MHz |
| Supply Voltage | 5 V ±5% | — |
| Technology | CMOS | 5 V CMOS |
| Programmability | UV-erasable (windowed package) | One-Time-Programmable (OTP), UV-erasable variant exists |
| Package | PLCC-28 | PDIP-24 |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Mounting Type | Surface Mount | Through-Hole |
| I/O Pins | [DATA_NEEDED: exact I/O count] | — |
| RoHS Status | [DATA_NEEDED] | unknown |
| Device Family | — | Altera Classic EPLD |
| Logic Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 300 |
| Supply Voltage (VCC) | — | 5 V |
| Programming Voltage (VPP) | — | 12 V |
| ICC (typical) | — | 200 mA |
| Pin Count | — | 24 |
| Lifecycle | — | Obsolete (last shipped ~2000s) |