EP610LC-25 vs EP610PC25 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP610LC-25 sa pamamagitan ng Intel at EP610PC25 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP610LC-25 | EP610PC25 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EPLD | — |
| Macrocells | 16 | 16 |
| Logic Array Blocks (LABs) | 4 | — |
| Propagation Delay (tPD) | 25 ns | 25 ns |
| Maximum Toggle Frequency | 100 MHz | — |
| Pipelined Data Rate | Up to 100 MHz | Up to 100 MHz |
| Volte ng Pagbibigay | 5 V ±5% | — |
| Technology | CMOS | 5 V CMOS |
| Programmability | UV-erasable (windowed package) | One-Time-Programmable (OTP), UV-erasable variant exists |
| Packhaging | PLCC-28 | PDIP-24 |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Uri ng Pagpapasok | Surface Mount | Through-Hole |
| I/O Pins | [DATA_NEEDED: exact I/O count] | — |
| Tindminan RoHS | [DATA_NEEDED] | unknown |
| Device Family | — | Altera Classic EPLD |
| Logic Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 300 |
| Supply Voltage (VCC) | — | 5 V |
| Programming Voltage (VPP) | — | 12 V |
| ICC (typical) | — | 200 mA |
| Bilang ng Pin | — | 24 |
| Lifecycle | — | Obsolete (last shipped ~2000s) |