EP610LC-35 vs EP610LC15 Comparison

Detailed side-by-side comparison of EP610LC-35 by Altera and EP610LC15 by Rochester Electronics. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP610LC-35 EP610LC15
Brand Altera Rochester Electronics
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Family Altera Classic EPLD —
Device Series EP610 —
Macrocells 16 —
Usable Gates 300 —
Propagation Delay (tpd) 37 ns —
Supply Voltage (Vcc) 5 V —
Technology CMOS EEPROM (one-time-programmable plastic) UV-erasable EPROM, CMOS
Package 28-pin PLCC (J-lead) PLCC-28 (J-Lead)
Operating Temperature Commercial (0C to +70C) [DATA_NEEDED: exact grade letter] 0 °C to +70 °C (LC suffix = commercial)
Speed Grade -35 (slowest EP610) —
Mounting Type Surface Mount —
Programmable Pins 24 input / 16 output (shared macrocells) —
RoHS Status [DATA_NEEDED: rohs_status] Compliant (Rochester re-creation)
Lead-Free [DATA_NEEDED: lead_free] —
MSL Level [DATA_NEEDED: msl_level] —
Programming Tool MAX+PLUS II development system —
Device Family — Classic EPLD (EP610)
Number of Macrocells — 16
Number of Usable Gates — [DATA_NEEDED: usable gate count]
Propagation Delay (tPD) — 15 ns
Maximum Toggle Frequency (fMAX) — 83.3 MHz
Supply Voltage (VCC) — 5 V (±10%)
Dedicated Inputs — 10
I/O Pins — 16
Total Logic Pins — 24
Programming Interface — Altera 4-pin serial (Classic algorithm)
Security Bit — Yes (programmable)

Datasheets & Resources

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