EP610LC-35 vs EP610LC15 Perbandingan

Perbandingan bersamaan detil EP610LC-35 dari Altera dan EP610LC15 dari Rochester Electronics. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP610LC-35 EP610LC15
Merek Altera Rochester Electronics
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family Altera Classic EPLD —
Device Series EP610 —
Macrocells 16 —
Usable Gates 300 —
Propagation Delay (tpd) 37 ns —
Supply Voltage (Vcc) 5 V —
Technology CMOS EEPROM (one-time-programmable plastic) UV-erasable EPROM, CMOS
Paket 28-pin PLCC (J-lead) PLCC-28 (J-Lead)
Suhu Kerja Commercial (0C to +70C) [DATA_NEEDED: exact grade letter] 0 °C to +70 °C (LC suffix = commercial)
Speed Grade -35 (slowest EP610) —
Tipe Mounting Surface Mount —
Programmable Pins 24 input / 16 output (shared macrocells) —
Status RoHS [DATA_NEEDED: rohs_status] Compliant (Rochester re-creation)
Lead-Free [DATA_NEEDED: lead_free] —
Level MSL [DATA_NEEDED: msl_level] —
Programming Tool MAX+PLUS II development system —
Device Family — Classic EPLD (EP610)
Number of Macrocells — 16
Number of Usable Gates — [DATA_NEEDED: usable gate count]
Propagation Delay (tPD) — 15 ns
Maximum Toggle Frequency (fMAX) — 83.3 MHz
Supply Voltage (VCC) — 5 V (±10%)
Dedicated Inputs — 10
I/O Pins — 16
Total Logic Pins — 24
Programming Interface — Altera 4-pin serial (Classic algorithm)
Security Bit — Yes (programmable)

Spek dan Sumber

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