EP610LC-35 vs EP610LC15 比較
詳細並排比較 EP610LC-35 由 Altera 與 EP610LC15 由 Rochester Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Rochester Electronics
EP610LC15 - 16-Macrocell Classic EPLD, 15ns, 5V, PLCC-28 | Rochester
EP610LC15 Obsolete規格比較
| 參數 | EP610LC-35 | EP610LC15 |
|---|---|---|
| 品牌 | Altera | Rochester Electronics |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Altera Classic EPLD | — |
| Device Series | EP610 | — |
| Macrocells | 16 | — |
| Usable Gates | 300 | — |
| Propagation Delay (tpd) | 37 ns | — |
| Supply Voltage (Vcc) | 5 V | — |
| Technology | CMOS EEPROM (one-time-programmable plastic) | UV-erasable EPROM, CMOS |
| 封裝 | 28-pin PLCC (J-lead) | PLCC-28 (J-Lead) |
| 工作溫度 | Commercial (0C to +70C) [DATA_NEEDED: exact grade letter] | 0 °C to +70 °C (LC suffix = commercial) |
| Speed Grade | -35 (slowest EP610) | — |
| 安裝類型 | Surface Mount | — |
| Programmable Pins | 24 input / 16 output (shared macrocells) | — |
| RoHS 狀態 | [DATA_NEEDED: rohs_status] | Compliant (Rochester re-creation) |
| Lead-Free | [DATA_NEEDED: lead_free] | — |
| MSL 等級 | [DATA_NEEDED: msl_level] | — |
| Programming Tool | MAX+PLUS II development system | — |
| Device Family | — | Classic EPLD (EP610) |
| Number of Macrocells | — | 16 |
| Number of Usable Gates | — | [DATA_NEEDED: usable gate count] |
| Propagation Delay (tPD) | — | 15 ns |
| Maximum Toggle Frequency (fMAX) | — | 83.3 MHz |
| Supply Voltage (VCC) | — | 5 V (±10%) |
| Dedicated Inputs | — | 10 |
| I/O Pins | — | 16 |
| Total Logic Pins | — | 24 |
| Programming Interface | — | Altera 4-pin serial (Classic algorithm) |
| Security Bit | — | Yes (programmable) |