EP610LC15 vs EP610DC-15 Comparison

Detailed side-by-side comparison of EP610LC15 by Rochester Electronics and EP610DC-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP610LC15 EP610DC-15
Brand Rochester Electronics Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Device Family Classic EPLD (EP610) —
Number of Macrocells 16 —
Number of Usable Gates [DATA_NEEDED: usable gate count] —
Propagation Delay (tPD) 15 ns 15 ns (speed grade -15)
Maximum Toggle Frequency (fMAX) 83.3 MHz —
Supply Voltage (VCC) 5 V (±10%) 4.75 V to 5.25 V
Dedicated Inputs 10 20
I/O Pins 16 —
Total Logic Pins 24 —
Technology UV-erasable EPROM, CMOS CMOS
Package PLCC-28 (J-Lead) 24-pin Ceramic DIP (CDIP-24) with UV window
Operating Temperature 0 °C to +70 °C (LC suffix = commercial) 0C to 70C (commercial)
Programming Interface Altera 4-pin serial (Classic algorithm) —
Security Bit Yes (programmable) —
RoHS Status Compliant (Rochester re-creation) [DATA_NEEDED: RoHS status]
Product Family — Classic EPLD (EP610)
Architecture — UV-erasable CMOS PAL-type
Macrocells — 16
Logic Expanders — 4
Bidirectional I/O Pins — 16
Total Product Terms — 160
Maximum Internal Clock Frequency — 71.4 MHz
Mounting Type — Through-Hole
Programming Method — JEDEC fuse map, UV erasure

Datasheets & Resources

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