EP610LC15 vs EP610DC-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP610LC15 sa pamamagitan ng Rochester Electronics at EP610DC-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Rochester Electronics
EP610LC15 - 16-Macrocell Classic EPLD, 15ns, 5V, PLCC-28 | Rochester
EP610LC15 Obsolete
Pagsanggunian na paghahambing
| Parametro | EP610LC15 | EP610DC-15 |
|---|---|---|
| Brand | Rochester Electronics | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Family | Classic EPLD (EP610) | — |
| Number of Macrocells | 16 | — |
| Number of Usable Gates | [DATA_NEEDED: usable gate count] | — |
| Propagation Delay (tPD) | 15 ns | 15 ns (speed grade -15) |
| Maximum Toggle Frequency (fMAX) | 83.3 MHz | — |
| Supply Voltage (VCC) | 5 V (±10%) | 4.75 V to 5.25 V |
| Dedicated Inputs | 10 | 20 |
| I/O Pins | 16 | — |
| Total Logic Pins | 24 | — |
| Technology | UV-erasable EPROM, CMOS | CMOS |
| Packhaging | PLCC-28 (J-Lead) | 24-pin Ceramic DIP (CDIP-24) with UV window |
| Temperature na Operasyon | 0 °C to +70 °C (LC suffix = commercial) | 0C to 70C (commercial) |
| Programming Interface | Altera 4-pin serial (Classic algorithm) | — |
| Security Bit | Yes (programmable) | — |
| Tindminan RoHS | Compliant (Rochester re-creation) | [DATA_NEEDED: RoHS status] |
| Product Family | — | Classic EPLD (EP610) |
| Architecture | — | UV-erasable CMOS PAL-type |
| Macrocells | — | 16 |
| Logic Expanders | — | 4 |
| Bidirectional I/O Pins | — | 16 |
| Total Product Terms | — | 160 |
| Maximum Internal Clock Frequency | — | 71.4 MHz |
| Uri ng Pagpapasok | — | Through-Hole |
| Programming Method | — | JEDEC fuse map, UV erasure |