EP610PC-25T vs EP610IPC-25 Comparison

Detailed side-by-side comparison of EP610PC-25T by Intel and EP610IPC-25 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP610PC-25T EP610IPC-25
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $28.95 $8.85
Manufacturer Intel (formerly Altera) β€”
Distributor / Stocking Source Rochester Electronics, LLC β€”
Device Family Altera Classic EPLD - EP610 β€”
Device Type Erasable Programmable Logic Device (EPLD, OTP for plastic package) β€”
Logic Capacity 300 usable gates Equivalent to ~24 standard 24-pin PALs
Macro Cells 16 β€”
Registers 16 β€”
User I/Os 16 β€”
Propagation Delay (tPD) 25 ns (speed grade 25) β€”
Maximum Toggle Frequency [DATA_NEEDED: max fmax] β€”
Pipelined Data Rate up to 100 MHz β€”
Supply Voltage (VCC) 5 V 4.75 V to 5.25 V
Process Technology ECMOS (CMOS, EPROM-based) β€”
Package PDIP-24 (Plastic DIP, 24-pin, 0.300 in row spacing) 24-pin PDIP (Plastic DIP)
Pinout Compatibility Pin-compatible with EP610DC-25 (CERDIP-24, windowed) β€”
Operating Temperature 0 Β°C to +70 Β°C (commercial) 0 Β°C to +70 Β°C (Commercial)
Programming Method OTP (one-time programmable) via Altera programming hardware β€”
Mounting Type Through-hole Through-Hole
RoHS Status [DATA_NEEDED: RoHS status] Non-compliant (contains Pb, PDIP package)
Shipping Form (T suffix) Tube β€”
Family β€” Classic EPLD (EP610)
Architecture β€” PAL-type, CMOS, Erasable
Propagation Delay (tpd) β€” 25 ns (max)
Maximum Inputs β€” 20
Maximum I/O Pins β€” 16
Dedicated Outputs β€” 16
Product Terms β€” 160
Technology β€” CMOS, UV-erasable (windowless in IPC pkg)
TTL Compatibility β€” 100% TTL emulation
MSL Level β€” [DATA_NEEDED: MSL level]

Datasheets & Resources

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