EP610PC-25T vs EP610IPC-25 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP610PC-25T disebabkan oleh Intel dan EP610IPC-25 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Intel
EP610PC-25T EP610PC-25T - 16-Macrocell Classic EPLD, 25ns, PDIP-24 | Intel / Altera

EP610PC-25T - 16-Macrocell Classic EPLD, 25ns, PDIP-24 | Intel / Altera

EP610PC-25T ⚠ Bahagian terakhir untuk beli

Pengandingan Spesifikasi

Parametr EP610PC-25T EP610IPC-25
Merek Intel Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Masa Terakhir Dibeli NRND
Manufacturer Intel (formerly Altera) —
Distributor / Stocking Source Rochester Electronics, LLC —
Device Family Altera Classic EPLD - EP610 —
Device Type Erasable Programmable Logic Device (EPLD, OTP for plastic package) —
Logic Capacity 300 usable gates Equivalent to ~24 standard 24-pin PALs
Macro Cells 16 —
Registers 16 —
User I/Os 16 —
Propagation Delay (tPD) 25 ns (speed grade 25) —
Maximum Toggle Frequency [DATA_NEEDED: max fmax] —
Pipelined Data Rate up to 100 MHz —
Supply Voltage (VCC) 5 V 4.75 V to 5.25 V
Process Technology ECMOS (CMOS, EPROM-based) —
Kemasan PDIP-24 (Plastic DIP, 24-pin, 0.300 in row spacing) 24-pin PDIP (Plastic DIP)
Pinout Compatibility Pin-compatible with EP610DC-25 (CERDIP-24, windowed) —
Suhu Operasi 0 °C to +70 °C (commercial) 0 °C to +70 °C (Commercial)
Programming Method OTP (one-time programmable) via Altera programming hardware —
Jenis Pemasangan Through-hole Through-Hole
Status RoHS [DATA_NEEDED: RoHS status] Non-compliant (contains Pb, PDIP package)
Shipping Form (T suffix) Tube —
Family — Classic EPLD (EP610)
Architecture — PAL-type, CMOS, Erasable
Propagation Delay (tpd) — 25 ns (max)
Maximum Inputs — 20
Maximum I/O Pins — 16
Dedicated Outputs — 16
Product Terms — 160
Technology — CMOS, UV-erasable (windowless in IPC pkg)
TTL Compatibility — 100% TTL emulation
Aras MSL — [DATA_NEEDED: MSL level]

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