EP610PC-25T vs EP610LI-25 Comparison
Detailed side-by-side comparison of EP610PC-25T by Intel and EP610LI-25 by Rochester Electronics. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP610PC-25T - 16-Macrocell Classic EPLD, 25ns, PDIP-24 | Intel / Altera
EP610PC-25T β Last Time BuyRochester Electronics
EP610LI-25 - 16-Macrocell Classic EPLD, 25ns, CMOS | Altera / Rochester Electronics
EP610LI-25 β ActiveSpecification Comparison
| Parameter | EP610PC-25T | EP610LI-25 |
|---|---|---|
| Brand | Intel | Rochester Electronics |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $28.95 | $17.25 |
| Manufacturer | Intel (formerly Altera) | β |
| Distributor / Stocking Source | Rochester Electronics, LLC | β |
| Device Family | Altera Classic EPLD - EP610 | β |
| Device Type | Erasable Programmable Logic Device (EPLD, OTP for plastic package) | β |
| Logic Capacity | 300 usable gates | β |
| Macro Cells | 16 | β |
| Registers | 16 | β |
| User I/Os | 16 | β |
| Propagation Delay (tPD) | 25 ns (speed grade 25) | β |
| Maximum Toggle Frequency | [DATA_NEEDED: max fmax] | β |
| Pipelined Data Rate | up to 100 MHz | β |
| Supply Voltage (VCC) | 5 V | β |
| Process Technology | ECMOS (CMOS, EPROM-based) | β |
| Package | PDIP-24 (Plastic DIP, 24-pin, 0.300 in row spacing) | Ceramic DIP-24 (windowed, Altera 'I' designation) |
| Pinout Compatibility | Pin-compatible with EP610DC-25 (CERDIP-24, windowed) | β |
| Operating Temperature | 0 Β°C to +70 Β°C (commercial) | β |
| Programming Method | OTP (one-time programmable) via Altera programming hardware | Altera MAX+PLUS II / Classic compiler + compatible programmer |
| Mounting Type | Through-hole | Through-hole |
| RoHS Status | [DATA_NEEDED: RoHS status] | Unknown - ceramic DIP legacy package |
| Shipping Form (T suffix) | Tube | β |
| Product Type | β | EPLD (Erasable Programmable Logic Device) |
| Family | β | Altera Classic EP610 |
| Macrocells | β | 16 |
| Usable Gates | β | 300 |
| Maximum Propagation Delay (tPD) | β | 25 ns |
| Pipelined Data Rate (fMAX) | β | 100 MHz |
| Speed Grade | β | 25 (25 ns tPD) |
| Power Variant | β | L (low-power CMOS) |
| Temperature Grade | β | I (industrial) |
| Dedicated Inputs | β | 4 |
| I/O Pins | β | 16 |
| Technology | β | CMOS, UV-erasable (windowed) |
| Manufacturer / Source | β | Altera (original), Rochester Electronics (authorized continuing supplier) |