EP610PC-25T vs EP610LI-25 Comparación
Comparación detallada lado a lado de EP610PC-25T por Intel y EP610LI-25 por Rochester Electronics. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EP610PC-25T - 16-Macrocell Classic EPLD, 25ns, PDIP-24 | Intel / Altera
EP610PC-25T ⚠ Última compraRochester Electronics
EP610LI-25 - 16-Macrocell Classic EPLD, 25ns, CMOS | Altera / Rochester Electronics
EP610LI-25 ✓ ActivoComparación de especificaciones
| Parámetro | EP610PC-25T | EP610LI-25 |
|---|---|---|
| Marca | Intel | Rochester Electronics |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $28,95 | $17,25 |
| Manufacturer | Intel (formerly Altera) | — |
| Distributor / Stocking Source | Rochester Electronics, LLC | — |
| Device Family | Altera Classic EPLD - EP610 | — |
| Device Type | Erasable Programmable Logic Device (EPLD, OTP for plastic package) | — |
| Logic Capacity | 300 usable gates | — |
| Macro Cells | 16 | — |
| Registers | 16 | — |
| User I/Os | 16 | — |
| Propagation Delay (tPD) | 25 ns (speed grade 25) | — |
| Maximum Toggle Frequency | [DATA_NEEDED: max fmax] | — |
| Pipelined Data Rate | up to 100 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| Process Technology | ECMOS (CMOS, EPROM-based) | — |
| Encapsulado | PDIP-24 (Plastic DIP, 24-pin, 0.300 in row spacing) | Ceramic DIP-24 (windowed, Altera 'I' designation) |
| Pinout Compatibility | Pin-compatible with EP610DC-25 (CERDIP-24, windowed) | — |
| Temperatura de funcionamiento | 0 °C to +70 °C (commercial) | — |
| Programming Method | OTP (one-time programmable) via Altera programming hardware | Altera MAX+PLUS II / Classic compiler + compatible programmer |
| Tipo de montaje | Through-hole | Through-hole |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Unknown - ceramic DIP legacy package |
| Shipping Form (T suffix) | Tube | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Family | — | Altera Classic EP610 |
| Macrocells | — | 16 |
| Usable Gates | — | 300 |
| Maximum Propagation Delay (tPD) | — | 25 ns |
| Pipelined Data Rate (fMAX) | — | 100 MHz |
| Speed Grade | — | 25 (25 ns tPD) |
| Power Variant | — | L (low-power CMOS) |
| Temperature Grade | — | I (industrial) |
| Dedicated Inputs | — | 4 |
| I/O Pins | — | 16 |
| Technology | — | CMOS, UV-erasable (windowed) |
| Manufacturer / Source | — | Altera (original), Rochester Electronics (authorized continuing supplier) |