EP610PC-25T vs EP610LI-25 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP610PC-25T sa pamamagitan ng Intel at EP610LI-25 sa pamamagitan ng Rochester Electronics. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP610PC-25T - 16-Macrocell Classic EPLD, 25ns, PDIP-24 | Intel / Altera
EP610PC-25T ⚠ Huling PagbiliRochester Electronics
EP610LI-25 - 16-Macrocell Classic EPLD, 25ns, CMOS | Altera / Rochester Electronics
EP610LI-25 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EP610PC-25T | EP610LI-25 |
|---|---|---|
| Brand | Intel | Rochester Electronics |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Aktibo |
| Manufacturer | Intel (formerly Altera) | — |
| Distributor / Stocking Source | Rochester Electronics, LLC | — |
| Device Family | Altera Classic EPLD - EP610 | — |
| Device Type | Erasable Programmable Logic Device (EPLD, OTP for plastic package) | — |
| Logic Capacity | 300 usable gates | — |
| Macro Cells | 16 | — |
| Registers | 16 | — |
| User I/Os | 16 | — |
| Propagation Delay (tPD) | 25 ns (speed grade 25) | — |
| Maximum Toggle Frequency | [DATA_NEEDED: max fmax] | — |
| Pipelined Data Rate | up to 100 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| Process Technology | ECMOS (CMOS, EPROM-based) | — |
| Packhaging | PDIP-24 (Plastic DIP, 24-pin, 0.300 in row spacing) | Ceramic DIP-24 (windowed, Altera 'I' designation) |
| Pinout Compatibility | Pin-compatible with EP610DC-25 (CERDIP-24, windowed) | — |
| Temperature na Operasyon | 0 °C to +70 °C (commercial) | — |
| Programming Method | OTP (one-time programmable) via Altera programming hardware | Altera MAX+PLUS II / Classic compiler + compatible programmer |
| Uri ng Pagpapasok | Through-hole | Through-hole |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Unknown - ceramic DIP legacy package |
| Shipping Form (T suffix) | Tube | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Family | — | Altera Classic EP610 |
| Macrocells | — | 16 |
| Usable Gates | — | 300 |
| Maximum Propagation Delay (tPD) | — | 25 ns |
| Pipelined Data Rate (fMAX) | — | 100 MHz |
| Speed Grade | — | 25 (25 ns tPD) |
| Power Variant | — | L (low-power CMOS) |
| Temperature Grade | — | I (industrial) |
| Dedicated Inputs | — | 4 |
| I/O Pins | — | 16 |
| Technology | — | CMOS, UV-erasable (windowed) |
| Manufacturer / Source | — | Altera (original), Rochester Electronics (authorized continuing supplier) |