EP610PC-30 vs EP610LC-30 Comparison
Detailed side-by-side comparison of EP610PC-30 by Altera and EP610LC-30 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610PC-30 | EP610LC-30 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $27.74 | $16.40 |
| Device Family | Classic EPLD (EP610) | β |
| Macrocells | 16 | β |
| Usable Gates | 300 | β |
| Propagation Delay (tPD) | 30 ns | β |
| Maximum Pipeline Frequency | 33.3 MHz (typical) / 100 MHz pipelined | β |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 4.75 V to 5.25 V |
| Process Technology | CMOS EPROM | β |
| Package | 24-pin PDIP (0.300 inch) | 24-pin CERDIP / PDIP |
| Mounting Type | Through-Hole | Through-Hole |
| Programmability | One-Time Programmable (OTP, no window on plastic PDIP) | β |
| Operating Temperature | 0C to +70C (commercial) | 0 C to +70 C (commercial) / -55 C to +125 C (military) |
| Output Drive Current | [DATA_NEEDED: IOH/IOL per datasheet DC characteristics] | β |
| Input Pins (Dedicated) | [DATA_NEEDED: dedicated input count from datasheet pinout] | β |
| I/O Pins | [DATA_NEEDED: bidirectional I/O count from datasheet pinout] | β |
| Programming Tool | Altera A+PLUS / MAX+PLUS II (legacy) | β |
| RoHS Status | Not applicable (legacy non-compliant package per distributor listing) | [DATA_NEEDED: RoHS status] |
| Lead Free Status | Not applicable | β |
| Current Distributor | Rochester Electronics, LLC (authorized continuing source) | β |
| Family | β | Classic EPLD (EP610) |
| Macro Cells | β | 16 |
| Logic Gates | β | Equivalent to 300 gates (typical) |
| Pin-to-Pin Delay (tPD) | β | 30 ns |
| Pipelined Data Rate | β | up to 100 MHz |
| Programming Voltage (VPP) | β | 13 V nominal |
| Technology | β | CMOS EPROM (UV-erasable) |
| Erase/Program Cycles | β | 1000 typical |
| Output Type | β | CMOS tri-state (programmable) |
| Logic Compatibility | β | TTL and CMOS |
| Turbo Mode | β | Yes (registered path bypass) |