EP610PC-30 vs EP610PC-20T Comparison

Detailed side-by-side comparison of EP610PC-30 by Altera and EP610PC-20T by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP610PC-30 EP610PC-20T
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $27.74 $7.20
Device Family Classic EPLD (EP610) β€”
Macrocells 16 β€”
Usable Gates 300 300 gates
Propagation Delay (tPD) 30 ns 20 ns
Maximum Pipeline Frequency 33.3 MHz (typical) / 100 MHz pipelined β€”
Supply Voltage (VCC) 5 V (4.75 V to 5.25 V) 5 V
Process Technology CMOS EPROM β€”
Package 24-pin PDIP (0.300 inch) 24-pin PDIP (Plastic DIP)
Mounting Type Through-Hole Through-Hole
Programmability One-Time Programmable (OTP, no window on plastic PDIP) β€”
Operating Temperature 0C to +70C (commercial) 0C to +70C (Commercial)
Output Drive Current [DATA_NEEDED: IOH/IOL per datasheet DC characteristics] β€”
Input Pins (Dedicated) [DATA_NEEDED: dedicated input count from datasheet pinout] β€”
I/O Pins [DATA_NEEDED: bidirectional I/O count from datasheet pinout] β€”
Programming Tool Altera A+PLUS / MAX+PLUS II (legacy) β€”
RoHS Status Not applicable (legacy non-compliant package per distributor listing) unknown
Lead Free Status Not applicable β€”
Current Distributor Rochester Electronics, LLC (authorized continuing source) β€”
Family β€” Classic EPLD
Logic Elements / Macrocells β€” 16 macrocells
Maximum Frequency (fMAX) β€” 62.5 MHz
Pipelined Data Rate β€” up to 100 MHz
Number of Dedicated Inputs β€” 16
Number of I/O Pins β€” 16
Programmable Output Enable β€” Yes (per macrocell)
Programming Technology β€” UV-erasable EPROM, CMOS
Development Tool β€” MAX+PLUS II

Datasheets & Resources

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