EP610PC-30 vs EP610PC-20T Vergleich

Detaillierter Direktvergleich von EP610PC-30 von Altera und EP610PC-20T von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP610PC-30 EP610PC-20T
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus NRND NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $27,74 $7,20
Device Family Classic EPLD (EP610) —
Macrocells 16 —
Usable Gates 300 300 gates
Propagation Delay (tPD) 30 ns 20 ns
Maximum Pipeline Frequency 33.3 MHz (typical) / 100 MHz pipelined —
Supply Voltage (VCC) 5 V (4.75 V to 5.25 V) 5 V
Process Technology CMOS EPROM —
Gehäuse 24-pin PDIP (0.300 inch) 24-pin PDIP (Plastic DIP)
Montageart Through-Hole Through-Hole
Programmability One-Time Programmable (OTP, no window on plastic PDIP) —
Betriebstemperatur 0C to +70C (commercial) 0C to +70C (Commercial)
Output Drive Current [DATA_NEEDED: IOH/IOL per datasheet DC characteristics] —
Input Pins (Dedicated) [DATA_NEEDED: dedicated input count from datasheet pinout] —
I/O Pins [DATA_NEEDED: bidirectional I/O count from datasheet pinout] —
Programming Tool Altera A+PLUS / MAX+PLUS II (legacy) —
RoHS-Status Not applicable (legacy non-compliant package per distributor listing) unknown
Lead Free Status Not applicable —
Current Distributor Rochester Electronics, LLC (authorized continuing source) —
Family — Classic EPLD
Logic Elements / Macrocells — 16 macrocells
Maximum Frequency (fMAX) — 62.5 MHz
Pipelined Data Rate — up to 100 MHz
Number of Dedicated Inputs — 16
Number of I/O Pins — 16
Programmable Output Enable — Yes (per macrocell)
Programming Technology — UV-erasable EPROM, CMOS
Development Tool — MAX+PLUS II

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