EP610PC-30 vs EP610PC-20T Comparaison
Comparaison détaillée côte à côte de EP610PC-30 par Altera et EP610PC-20T par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP610PC-30 | EP610PC-20T |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $27,74 | $7,20 |
| Device Family | Classic EPLD (EP610) | — |
| Macrocells | 16 | — |
| Usable Gates | 300 | 300 gates |
| Propagation Delay (tPD) | 30 ns | 20 ns |
| Maximum Pipeline Frequency | 33.3 MHz (typical) / 100 MHz pipelined | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V |
| Process Technology | CMOS EPROM | — |
| Boîtier | 24-pin PDIP (0.300 inch) | 24-pin PDIP (Plastic DIP) |
| Type de montage | Through-Hole | Through-Hole |
| Programmability | One-Time Programmable (OTP, no window on plastic PDIP) | — |
| Température de fonctionnement | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| Output Drive Current | [DATA_NEEDED: IOH/IOL per datasheet DC characteristics] | — |
| Input Pins (Dedicated) | [DATA_NEEDED: dedicated input count from datasheet pinout] | — |
| I/O Pins | [DATA_NEEDED: bidirectional I/O count from datasheet pinout] | — |
| Programming Tool | Altera A+PLUS / MAX+PLUS II (legacy) | — |
| Statut RoHS | Not applicable (legacy non-compliant package per distributor listing) | unknown |
| Lead Free Status | Not applicable | — |
| Current Distributor | Rochester Electronics, LLC (authorized continuing source) | — |
| Family | — | Classic EPLD |
| Logic Elements / Macrocells | — | 16 macrocells |
| Maximum Frequency (fMAX) | — | 62.5 MHz |
| Pipelined Data Rate | — | up to 100 MHz |
| Number of Dedicated Inputs | — | 16 |
| Number of I/O Pins | — | 16 |
| Programmable Output Enable | — | Yes (per macrocell) |
| Programming Technology | — | UV-erasable EPROM, CMOS |
| Development Tool | — | MAX+PLUS II |