EP610PC-35 vs EP610PC-20 Comparison
Detailed side-by-side comparison of EP610PC-35 by Rochester Electronics and EP610PC-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Rochester Electronics
EP610PC-35 - 16-Macrocell Classic EPLD, 35ns tPD | Rochester
EP610PC-35 ✓ ActiveSpecification Comparison
| Parameter | EP610PC-35 | EP610PC-20 |
|---|---|---|
| Brand | Rochester Electronics | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Obsolete |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EPLD | Classic EPLD |
| Macrocells | 16 | — |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 37 ns (max, -35 speed grade) | 20 ns |
| Internal Counter Frequency | up to 100 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V ±10% |
| Supply Voltage - Internal | 4.75 V to 5.25 V | — |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Programmable Type | EPLD (UV-erasable window variant: EP610DC; plastic OTP) | — |
| Package | 24-pin PDIP (Plastic DIP, 0.600" wide, through-hole) | PDIP-24 |
| Mounting Type | Through Hole | — |
| Supplier Device Package | 24-PDIP | — |
| Logic Family | CMOS | — |
| RoHS Status | [DATA_NEEDED: RoHS status - not confirmed in provided data] | Non-compliant (legacy PDIP) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| MSL Level | [DATA_NEEDED: MSL level] | — |
| Logic Elements | — | 16 macrocells |
| Maximum Operating Frequency | — | 100 MHz (pipelined) |
| Number of Pins | — | 24 |
| Process Technology | — | CMOS EPROM |
| Programmable Flip-Flops | — | 16 |
| Input Pins | — | 24 |
| Output Pins | — | 16 |
| I/O Compatibility | — | TTL |
| Program/Erase Method | — | UV (windowed) or OTP |