EP610PC-35 vs EP610PC-20 Vergleich
Detaillierter Direktvergleich von EP610PC-35 von Rochester Electronics und EP610PC-20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Rochester Electronics
EP610PC-35 - 16-Macrocell Classic EPLD, 35ns tPD | Rochester
EP610PC-35 ✓ AktivSpezifikationsvergleich
| Parameter | EP610PC-35 | EP610PC-20 |
|---|---|---|
| Marke | Rochester Electronics | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $16,79 | $47,80 |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EPLD | Classic EPLD |
| Macrocells | 16 | — |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 37 ns (max, -35 speed grade) | 20 ns |
| Internal Counter Frequency | up to 100 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 5 V ±10% |
| Supply Voltage - Internal | 4.75 V to 5.25 V | — |
| Betriebstemperatur | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Programmable Type | EPLD (UV-erasable window variant: EP610DC; plastic OTP) | — |
| Gehäuse | 24-pin PDIP (Plastic DIP, 0.600" wide, through-hole) | PDIP-24 |
| Montageart | Through Hole | — |
| Supplier Device Package | 24-PDIP | — |
| Logic Family | CMOS | — |
| RoHS-Status | [DATA_NEEDED: RoHS status - not confirmed in provided data] | Non-compliant (legacy PDIP) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| Logic Elements | — | 16 macrocells |
| Maximum Operating Frequency | — | 100 MHz (pipelined) |
| Anzahl der Pins | — | 24 |
| Process Technology | — | CMOS EPROM |
| Programmable Flip-Flops | — | 16 |
| Input Pins | — | 24 |
| Output Pins | — | 16 |
| I/O Compatibility | — | TTL |
| Program/Erase Method | — | UV (windowed) or OTP |