EP610PC-35 vs EP610PC-25 Comparison

Detailed side-by-side comparison of EP610PC-35 by Rochester Electronics and EP610PC-25 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Rochester Electronics
EP610PC-35 EP610PC-35 - 16-Macrocell Classic EPLD, 35ns tPD | Rochester

EP610PC-35 - 16-Macrocell Classic EPLD, 35ns tPD | Rochester

EP610PC-35 ✓ Active

Specification Comparison

Parameter EP610PC-35 EP610PC-25
Brand Rochester Electronics Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Obsolete
Device Type EPLD (Erasable Programmable Logic Device) OT PLD, PAL-type, CMOS
Family Classic EPLD —
Macrocells 16 —
Usable Gates 300 300
Propagation Delay (tPD) 37 ns (max, -35 speed grade) —
Internal Counter Frequency up to 100 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) —
Supply Voltage - Internal 4.75 V to 5.25 V —
Operating Temperature 0C to +70C (commercial) [DATA_NEEDED: operating temperature grade]
Programmable Type EPLD (UV-erasable window variant: EP610DC; plastic OTP) —
Package 24-pin PDIP (Plastic DIP, 0.600" wide, through-hole) PDIP-24 (0.3 inch, through-hole)
Mounting Type Through Hole Through-Hole (DIP)
Supplier Device Package 24-PDIP —
Logic Family CMOS —
RoHS Status [DATA_NEEDED: RoHS status - not confirmed in provided data] [DATA_NEEDED: RoHS status]
Lead-Free [DATA_NEEDED: lead-free status] —
MSL Level [DATA_NEEDED: MSL level] —
Device Family — Classic EPLD (EP610 series)
Macro Cells — 16
Propagation Delay (tpd) — 25 ns
Maximum Pipelined Data Rate — 100 MHz
Supply Voltage (Vcc) — 5 V (nominal)
Technology — CMOS, EPROM (UV-erasable)
Dedicated Inputs — 4
I/O Pins — 20 (bidirectional, JTAG-programmable OE per macrocell)
Programming Method — EPROM (UV-erasable), via Altera programming hardware

Datasheets & Resources

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