EP610PC-35 vs EP610PC-25 比較
詳細並排比較 EP610PC-35 由 Rochester Electronics 與 EP610PC-25 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP610PC-35 | EP610PC-25 |
|---|---|---|
| 品牌 | Rochester Electronics | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | Obsolete |
| Device Type | EPLD (Erasable Programmable Logic Device) | OT PLD, PAL-type, CMOS |
| Family | Classic EPLD | — |
| Macrocells | 16 | — |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 37 ns (max, -35 speed grade) | — |
| Internal Counter Frequency | up to 100 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | — |
| Supply Voltage - Internal | 4.75 V to 5.25 V | — |
| 工作溫度 | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature grade] |
| Programmable Type | EPLD (UV-erasable window variant: EP610DC; plastic OTP) | — |
| 封裝 | 24-pin PDIP (Plastic DIP, 0.600" wide, through-hole) | PDIP-24 (0.3 inch, through-hole) |
| 安裝類型 | Through Hole | Through-Hole (DIP) |
| Supplier Device Package | 24-PDIP | — |
| Logic Family | CMOS | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status - not confirmed in provided data] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| Device Family | — | Classic EPLD (EP610 series) |
| Macro Cells | — | 16 |
| Propagation Delay (tpd) | — | 25 ns |
| Maximum Pipelined Data Rate | — | 100 MHz |
| Supply Voltage (Vcc) | — | 5 V (nominal) |
| Technology | — | CMOS, EPROM (UV-erasable) |
| Dedicated Inputs | — | 4 |
| I/O Pins | — | 20 (bidirectional, JTAG-programmable OE per macrocell) |
| Programming Method | — | EPROM (UV-erasable), via Altera programming hardware |