EP910ILC-25 vs EP910IPC-25 Comparison
Detailed side-by-side comparison of EP910ILC-25 by Intel and EP910IPC-25 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910ILC-25 | EP910IPC-25 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | EP910 Classic EPLD | Classic EPLD (EP910 series) |
| Macrocells | 24 | 24 |
| User I/O Pins | 36 | — |
| Propagation Delay (tPD) | 25 ns | 25 ns |
| Internal Frequency (fMAX) | [DATA_NEEDED: fMAX rating] | — |
| Logic Blocks | Sum-of-products AND/OR array | — |
| Technology | CMOS EPROM (UV-erasable) | — |
| Configuration Memory | Non-volatile EPROM (windowed ceramic) | — |
| Package | 44-pin JLCC (windowed ceramic) | 40-pin PDIP (PDIP-40) |
| Mounting Type | Surface Mount | Through-Hole |
| Operating Temperature | -40C to +85C (industrial) | 0C to +70C (commercial grade) |
| Supply Voltage | 5 V | — |
| Development Tool | Altera MAX+PLUS II (legacy) | MAX+PLUS II |
| RoHS Status | non_compliant (ceramic windowed package) | — |
| Lifecycle Status | Obsolete - last time buy was late 1990s | — |
| Manufacturer | — | Altera (now Intel) |
| Architecture | — | PAL-type EPLD, CMOS, UV/OTP |
| Usable Gates | — | 450 |
| Product Terms | — | 240 |
| Maximum Frequency (fMAX) | — | 40 MHz |
| Dedicated Inputs | — | 12 |
| Bidirectional I/O Lines | — | 24 |
| Total Inputs (max) | — | 36 |
| Total Outputs (max) | — | 24 |
| Supply Voltage (VCC) | — | 5 V |
| Programming Method | — | EPROM cell (OTP / UV erasable) |