EP910ILC-25 vs EP910IPC-25 Comparaison
Comparaison détaillée côte à côte de EP910ILC-25 par Intel et EP910IPC-25 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910ILC-25 | EP910IPC-25 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,95 | $10,40 |
| Family | EP910 Classic EPLD | Classic EPLD (EP910 series) |
| Macrocells | 24 | 24 |
| User I/O Pins | 36 | — |
| Propagation Delay (tPD) | 25 ns | 25 ns |
| Internal Frequency (fMAX) | [DATA_NEEDED: fMAX rating] | — |
| Logic Blocks | Sum-of-products AND/OR array | — |
| Technology | CMOS EPROM (UV-erasable) | — |
| Configuration Memory | Non-volatile EPROM (windowed ceramic) | — |
| Boîtier | 44-pin JLCC (windowed ceramic) | 40-pin PDIP (PDIP-40) |
| Type de montage | Surface Mount | Through-Hole |
| Température de fonctionnement | -40C to +85C (industrial) | 0C to +70C (commercial grade) |
| Tension d'alimentation | 5 V | — |
| Development Tool | Altera MAX+PLUS II (legacy) | MAX+PLUS II |
| Statut RoHS | non_compliant (ceramic windowed package) | — |
| Statut du cycle de vie | Obsolete - last time buy was late 1990s | — |
| Manufacturer | — | Altera (now Intel) |
| Architecture | — | PAL-type EPLD, CMOS, UV/OTP |
| Usable Gates | — | 450 |
| Product Terms | — | 240 |
| Maximum Frequency (fMAX) | — | 40 MHz |
| Dedicated Inputs | — | 12 |
| Bidirectional I/O Lines | — | 24 |
| Total Inputs (max) | — | 36 |
| Total Outputs (max) | — | 24 |
| Supply Voltage (VCC) | — | 5 V |
| Programming Method | — | EPROM cell (OTP / UV erasable) |