EP910ILC-25 vs EP910IPC-25 比較
詳細な並列比較: EP910ILC-25 メーカー: Intel および EP910IPC-25 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP910ILC-25 | EP910IPC-25 |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.95 | $10.40 |
| Family | EP910 Classic EPLD | Classic EPLD (EP910 series) |
| Macrocells | 24 | 24 |
| User I/O Pins | 36 | — |
| Propagation Delay (tPD) | 25 ns | 25 ns |
| Internal Frequency (fMAX) | [DATA_NEEDED: fMAX rating] | — |
| Logic Blocks | Sum-of-products AND/OR array | — |
| Technology | CMOS EPROM (UV-erasable) | — |
| Configuration Memory | Non-volatile EPROM (windowed ceramic) | — |
| パッケージ | 44-pin JLCC (windowed ceramic) | 40-pin PDIP (PDIP-40) |
| 実装タイプ | Surface Mount | Through-Hole |
| 動作温度 | -40C to +85C (industrial) | 0C to +70C (commercial grade) |
| 電源電圧 | 5 V | — |
| Development Tool | Altera MAX+PLUS II (legacy) | MAX+PLUS II |
| RoHS ステータス | non_compliant (ceramic windowed package) | — |
| ライフサイクル状態 | Obsolete - last time buy was late 1990s | — |
| Manufacturer | — | Altera (now Intel) |
| Architecture | — | PAL-type EPLD, CMOS, UV/OTP |
| Usable Gates | — | 450 |
| Product Terms | — | 240 |
| Maximum Frequency (fMAX) | — | 40 MHz |
| Dedicated Inputs | — | 12 |
| Bidirectional I/O Lines | — | 24 |
| Total Inputs (max) | — | 36 |
| Total Outputs (max) | — | 24 |
| Supply Voltage (VCC) | — | 5 V |
| Programming Method | — | EPROM cell (OTP / UV erasable) |