EP910IPC-15 vs EP910IPC-25 Comparison
Detailed side-by-side comparison of EP910IPC-15 by Altera and EP910IPC-25 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910IPC-15 | EP910IPC-25 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.95 | $10.40 |
| Device Family | Altera Classic EPLD (EP910 series) | β |
| Product Type | Erasable Programmable Logic Device (EPLD) | β |
| Architecture | PAL-type, CMOS | PAL-type EPLD, CMOS, UV/OTP |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | 12 |
| I/O Pins | 24 | β |
| Product Terms | 240 | 240 |
| External Clocks | 2 | β |
| Propagation Delay (tPD) | 15 ns | 25 ns |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 5 V |
| Operating Temperature | 0C to +70C (commercial, IPC suffix) | 0C to +70C (commercial grade) |
| Package | PDIP-40 (Plastic DIP, 40-pin) | 40-pin PDIP (PDIP-40) |
| Mounting Type | Through-Hole | Through-Hole |
| Process Technology | CMOS | β |
| Programming Method | JEDEC fuse map via Altera EPLD programmer | EPROM cell (OTP / UV erasable) |
| Pin Count | 40 | β |
| RoHS Status | [DATA_NEEDED: rohs status not confirmed in verified data] | β |
| Family | β | Classic EPLD (EP910 series) |
| Manufacturer | β | Altera (now Intel) |
| Usable Gates | β | 450 |
| Maximum Frequency (fMAX) | β | 40 MHz |
| Bidirectional I/O Lines | β | 24 |
| Total Inputs (max) | β | 36 |
| Total Outputs (max) | β | 24 |
| Development Tool | β | MAX+PLUS II |