EP910JC-30 vs EP910LC-30 Comparison
Detailed side-by-side comparison of EP910JC-30 by Intel and EP910LC-30 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910JC-30 | EP910LC-30 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.75 | $22.50 |
| Family | Classic EPLD (MAX-style) | β |
| Propagation Delay (tpd) | 30 ns | β |
| Maximum Internal Frequency (Fmax) | 33.3 MHz | β |
| Macrocells | 24 | β |
| Inputs | 36 | β |
| Product Terms | 240 | β |
| Outputs | 10 dedicated | β |
| Supply Voltage (Vcc) | 5 V | β |
| Technology | CMOS EPROM, UV-erasable | β |
| Package | 44-pin Windowed Ceramic J-Lead Chip Carrier (CQCC-44 / JLCC-44) | β |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | β |
| Supply Current (Icc) | [DATA_NEEDED: Icc typical / maximum] | β |
| Mounting Type | Surface Mount (socket-mountable) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Logic Blocks | 24 macrocells (AND/OR array architecture) | β |
| Device Type | β | EPLD (Erasable Programmable Logic Device) |
| Macrocell Count | β | 24 |
| Propagation Delay (tPD) | β | 30 ns (max) |
| Maximum Toggle Frequency | β | 62 MHz |
| Supply Voltage (VCC) | β | 5 V (nominal, TTL) |
| Process Technology | β | CMOS (EPROM-based) |
| Package Type | β | PDIP-40 (Plastic DIP, through-hole) |
| Operating Temperature Grade | β | Commercial (0C to +70C) |
| I/O Pin Count | β | 24 |
| Dedicated Input Pins | β | 36 (including I/O) |
| Product Terms per Macrocell | β | Up to 16 |
| Programming Technology | β | UV-erasable EPROM cell |
| Development Tool | β | Altera MAX+PLUS II |
| MSL Level | β | [DATA_NEEDED: MSL level] |