EP910JC-30 vs EP910LC-30 Perbandingan

Perbandingan bersamaan detil EP910JC-30 dari Intel dan EP910LC-30 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP910JC-30 EP910LC-30
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family Classic EPLD (MAX-style) —
Propagation Delay (tpd) 30 ns —
Maximum Internal Frequency (Fmax) 33.3 MHz —
Macrocells 24 —
Inputs 36 —
Product Terms 240 —
Outputs 10 dedicated —
Supply Voltage (Vcc) 5 V —
Technology CMOS EPROM, UV-erasable —
Paket 44-pin Windowed Ceramic J-Lead Chip Carrier (CQCC-44 / JLCC-44) —
Suhu Kerja [DATA_NEEDED: operating temperature range] —
Supply Current (Icc) [DATA_NEEDED: Icc typical / maximum] —
Tipe Mounting Surface Mount (socket-mountable) —
Status RoHS [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Logic Blocks 24 macrocells (AND/OR array architecture) —
Device Type — EPLD (Erasable Programmable Logic Device)
Macrocell Count — 24
Propagation Delay (tPD) — 30 ns (max)
Maximum Toggle Frequency — 62 MHz
Supply Voltage (VCC) — 5 V (nominal, TTL)
Process Technology — CMOS (EPROM-based)
Package Type — PDIP-40 (Plastic DIP, through-hole)
Operating Temperature Grade — Commercial (0C to +70C)
I/O Pin Count — 24
Dedicated Input Pins — 36 (including I/O)
Product Terms per Macrocell — Up to 16
Programming Technology — UV-erasable EPROM cell
Development Tool — Altera MAX+PLUS II
Level MSL — [DATA_NEEDED: MSL level]

Spek dan Sumber

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