EP910LC44-35 vs EP910LI44-35 Comparison
Detailed side-by-side comparison of EP910LC44-35 by Intel and EP910LI44-35 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LC44-35 | EP910LI44-35 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | NRND |
| Family | Classic EPLD (OT sub-family) | — |
| Architecture | PAL-type AND/OR array | PAL-type macrocell (EPLD) |
| Macrocells | 24 | — |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 35 ns (max) | 35 ns |
| Maximum Frequency (fMAX) | 28.6 MHz | — |
| Total Inputs | 36 | — |
| I/O Pins | 24 | — |
| Global Clocks | 2 | — |
| Supply Voltage (VCC) | 5 V (single supply) | — |
| Operating Temperature | 0C to +70C (commercial) | [DATA_NEEDED: temperature grade] |
| Package | 44-pin PLCC (J-leaded) | — |
| Mounting Type | Surface Mount | Surface Mount / Through-Hole Socket |
| Process Technology | CMOS | CMOS |
| Programmability | UV-erasable (windowed ceramic) | UV-erasable / one-time programmable |
| Device Family | — | Altera Classic EPLD |
| Series | — | EP910 |
| Number of Macrocells | — | 24 |
| Number of External Clocks | — | 2 |
| Maximum Clock Frequency | — | 37 MHz |
| Supply Voltage | — | [DATA_NEEDED: VCC range] |
| Number of Pins | — | 44 |
| Package Type | — | PLCC-44 (J-lead) |
| RoHS Status | — | unknown |
| Logic Family | — | Classic EPLD |