EP910LC44-35 vs EP910LI44-35 Perbandingan
Perbandingan bersamaan detil EP910LC44-35 dari Intel dan EP910LI44-35 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EP910LC44-35 | EP910LI44-35 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | NRND |
| Family | Classic EPLD (OT sub-family) | — |
| Architecture | PAL-type AND/OR array | PAL-type macrocell (EPLD) |
| Macrocells | 24 | — |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 35 ns (max) | 35 ns |
| Maximum Frequency (fMAX) | 28.6 MHz | — |
| Total Inputs | 36 | — |
| I/O Pins | 24 | — |
| Global Clocks | 2 | — |
| Supply Voltage (VCC) | 5 V (single supply) | — |
| Suhu Kerja | 0C to +70C (commercial) | [DATA_NEEDED: temperature grade] |
| Paket | 44-pin PLCC (J-leaded) | — |
| Tipe Mounting | Surface Mount | Surface Mount / Through-Hole Socket |
| Process Technology | CMOS | CMOS |
| Programmability | UV-erasable (windowed ceramic) | UV-erasable / one-time programmable |
| Device Family | — | Altera Classic EPLD |
| Series | — | EP910 |
| Number of Macrocells | — | 24 |
| Number of External Clocks | — | 2 |
| Frekuensi Bawah Maximum | — | 37 MHz |
| Tegangan Pemuat | — | [DATA_NEEDED: VCC range] |
| Jumlah Pin | — | 44 |
| Package Type | — | PLCC-44 (J-lead) |
| Status RoHS | — | unknown |
| Logic Family | — | Classic EPLD |