EP910LI-20 vs EP910LI-50 Comparison
Detailed side-by-side comparison of EP910LI-20 by Altera and EP910LI-50 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LI-20 | EP910LI-50 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $19.95 | $65.00 |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Macrocells | 24 | 24 |
| Maximum Operating Frequency | 62 MHz | β |
| Propagation Delay (tpd) | 20 ns | β |
| Dedicated Inputs | 16 | β |
| I/O Pins | 24 | [DATA_NEEDED: I/O pin count] |
| Supply Voltage (VCC) | 5 V | 5 V +/- 10% |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +85C (industrial) |
| Package | 40-pin Ceramic DIP (Windowed) | β |
| Technology | CMOS, UV-erasable | CMOS, UV-erasable EPROM |
| Package Type | Through-Hole, Ceramic DIP with Quartz Window | CERDIP-40 (L) |
| Temperature Grade | Industrial (-40C to +85C) | β |
| Pin Count | 40 | β |
| Logic Family | EPLD (Erasable PLD) | β |
| Architecture | Sum-of-products macrocell | β |
| Pin/Package Compatibility | Pin-compatible across EP910 family | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Usable Gates | β | 450 |
| Propagation Delay (tPD) | β | 50 ns |
| Package Pin Count | β | 40 |
| Logic Blocks | β | Classic AND/OR array architecture |
| Programming Method | β | EPROM programmer (UV-erasable window) |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |
| Speed Grade Suffix | β | -50 (50 ns tPD) |