EP910LI-20 vs EP910LI-50 比較
詳細な並列比較: EP910LI-20 メーカー: Altera および EP910LI-50 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP910LI-20 | EP910LI-50 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $19.95 | $65.00 |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Macrocells | 24 | 24 |
| Maximum Operating Frequency | 62 MHz | — |
| Propagation Delay (tpd) | 20 ns | — |
| Dedicated Inputs | 16 | — |
| I/O Pins | 24 | [DATA_NEEDED: I/O pin count] |
| Supply Voltage (VCC) | 5 V | 5 V +/- 10% |
| 動作温度 | -40C to +85C (Industrial) | -40C to +85C (industrial) |
| パッケージ | 40-pin Ceramic DIP (Windowed) | — |
| Technology | CMOS, UV-erasable | CMOS, UV-erasable EPROM |
| Package Type | Through-Hole, Ceramic DIP with Quartz Window | CERDIP-40 (L) |
| Temperature Grade | Industrial (-40C to +85C) | — |
| ピン数 | 40 | — |
| Logic Family | EPLD (Erasable PLD) | — |
| Architecture | Sum-of-products macrocell | — |
| Pin/Package Compatibility | Pin-compatible across EP910 family | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Usable Gates | — | 450 |
| Propagation Delay (tPD) | — | 50 ns |
| Package Pin Count | — | 40 |
| Logic Blocks | — | Classic AND/OR array architecture |
| Programming Method | — | EPROM programmer (UV-erasable window) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Speed Grade Suffix | — | -50 (50 ns tPD) |