EP910LI-30T vs EP910LI-35BF Comparison

Detailed side-by-side comparison of EP910LI-30T by Altera and EP910LI-35BF by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP910LI-30T EP910LI-35BF
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $64.59 $23.95
Family Altera Classic EPLD β€”
Number of Macrocells 24 β€”
Usable Gates 450 β€”
Propagation Delay (tPD) 30 ns β€”
Clock-to-Output (tCO) [DATA_NEEDED: tCO] β€”
Maximum Frequency (fMAX) [DATA_NEEDED: fMAX] β€”
Dedicated Inputs 10 β€”
I/O Pins 24 β€”
Package PQCC-44 (J-lead) 44-pin PLCC (J-lead)
Operating Temperature -40C to +85C (Industrial) β€”
Technology CMOS, UV-erasable CMOS, UV-erasable
Supply Voltage [DATA_NEEDED: VCC] β€”
Mounting Type Surface Mount β€”
Programming Method EPROM (UV-erasable) via Altera Logic Programmer EPROM/UV-erase programmer (Altera Classic algorithm)
RoHS Status [DATA_NEEDED: RoHS] β€”
Lead-Free [DATA_NEEDED: Lead-free] β€”
Device Family β€” Altera Classic EPLD
Part Number Base β€” EP910
Logic Density β€” 450 usable gates
Macrocells β€” 24
Maximum Pin-to-Pin Delay (tpd) β€” 35 ns
Maximum Toggle Frequency (fmax) β€” 28.6 MHz
Supply Voltage (VCC) β€” 5 V (nominal)
Operating Temperature Range β€” Industrial (LI suffix)
Output Polarity Control β€” Programmable XOR per macrocell
Flip-Flop Type β€” Selectable D/T/JK/SR per macrocell
TTL Compatibility β€” 100% TTL emulation
Compliance / EOL Status β€” Obsolete - last-time buy exhausted; second-source via Rochester Electronics

Datasheets & Resources

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