EP910PC-0 vs EP910PC-25 Comparison
Detailed side-by-side comparison of EP910PC-0 by Altera and EP910PC-25 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PC-0 | EP910PC-25 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EPLD | — |
| Usable Gates | 900 gates | 900 |
| Macrocells | 24 | 24 |
| Logic Blocks | 6 (4 macrocells each) | — |
| Dedicated Inputs | 10 | 10 |
| I/O Pins | 24 | — |
| Package | PDIP-40 (Plastic DIP, 40-pin) | PDIP-24 (Plastic DIP) |
| Speed Grade | -0 (slowest) | — |
| Supply Voltage | 5 V (single supply) | — |
| Process Technology | CMOS | — |
| Logic Compatibility | 100% TTL emulation | — |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Programming Method | UV-erasable / OTP | — |
| Mounting Type | Through-Hole (DIP) | — |
| Product Family | — | Classic EPLD |
| Integration Gates (typical) | — | 4800 |
| Pin-to-Pin Delay (tPD) | — | 25 ns |
| Maximum Operating Frequency (fMAX) | — | 33.3 MHz |
| Supply Voltage (VCC) | — | 5 V +/- 10% |
| Technology | — | CMOS EPROM |
| Pin Count | — | 24 |
| Dedicated I/O Pins | — | 12 |
| TTL Compatibility | — | 100% TTL emulation |
| Erasure Method | — | Not erasable in plastic package (windowless) |