EP910PC-20 vs EP910PC-15 Comparison
Detailed side-by-side comparison of EP910PC-20 by Altera and EP910PC-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PC-20 | EP910PC-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device | EP910 | — |
| Usable Gates | 900 | 900 |
| Macrocell Count | [DATA_NEEDED: macrocell count] | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Package | PDIP-24 (PC suffix) | 24-pin PDIP (PDIP-24, 0.300 inch) |
| Pin Count | 24 | — |
| Supply Voltage (VCC) | 5 V | 4.75 V to 5.25 V (5 V nominal) |
| Technology | CMOS EPROM (UV-erasable) | — |
| I/O Compatibility | 100% TTL | — |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Programming Method | EPROM programmer, JEDEC fuse map | Altera Logic Programmer card |
| Mounting Type | Through-Hole (DIP) | Through-Hole |
| MSL Level | [DATA_NEEDED: MSL level] | Not applicable (through-hole) |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS] |
| Macrocells | — | 24 |
| Maximum Pin-to-Pin Delay (tpd) | — | 15 ns |
| Counter Frequency (fCNT) | — | 100 MHz |
| Supply Current (Icc) | — | 80 mA typical |
| Dedicated Inputs | — | 10 |
| Dedicated I/O Pins | — | 12 |
| Process Technology | — | CMOS, UV-erasable |