EP910PC-20 vs EP910PC-15 比較
詳細並排比較 EP910PC-20 由 Altera 與 EP910PC-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP910PC-20 | EP910PC-15 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device | EP910 | — |
| Usable Gates | 900 | 900 |
| Macrocell Count | [DATA_NEEDED: macrocell count] | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| 封裝 | PDIP-24 (PC suffix) | 24-pin PDIP (PDIP-24, 0.300 inch) |
| 腳位數 | 24 | — |
| Supply Voltage (VCC) | 5 V | 4.75 V to 5.25 V (5 V nominal) |
| Technology | CMOS EPROM (UV-erasable) | — |
| I/O Compatibility | 100% TTL | — |
| 工作溫度 | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Programming Method | EPROM programmer, JEDEC fuse map | Altera Logic Programmer card |
| 安裝類型 | Through-Hole (DIP) | Through-Hole |
| MSL 等級 | [DATA_NEEDED: MSL level] | Not applicable (through-hole) |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS] |
| Macrocells | — | 24 |
| Maximum Pin-to-Pin Delay (tpd) | — | 15 ns |
| Counter Frequency (fCNT) | — | 100 MHz |
| Supply Current (Icc) | — | 80 mA typical |
| Dedicated Inputs | — | 10 |
| Dedicated I/O Pins | — | 12 |
| Process Technology | — | CMOS, UV-erasable |