EP910PC-20 vs EP910PC-15 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP910PC-20 sa pamamagitan ng Altera at EP910PC-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP910PC-20 EP910PC-15
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family Altera Classic EPLD Altera Classic EPLD
Device EP910 —
Usable Gates 900 900
Macrocell Count [DATA_NEEDED: macrocell count] —
Pin-to-Pin Delay (tPD) 20 ns —
Packhaging PDIP-24 (PC suffix) 24-pin PDIP (PDIP-24, 0.300 inch)
Bilang ng Pin 24 —
Supply Voltage (VCC) 5 V 4.75 V to 5.25 V (5 V nominal)
Technology CMOS EPROM (UV-erasable) —
I/O Compatibility 100% TTL —
Temperature na Operasyon 0C to +70C (commercial) 0C to +70C (commercial)
Programming Method EPROM programmer, JEDEC fuse map Altera Logic Programmer card
Uri ng Pagpapasok Through-Hole (DIP) Through-Hole
Level ng MSL [DATA_NEEDED: MSL level] Not applicable (through-hole)
Tindminan RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS]
Macrocells — 24
Maximum Pin-to-Pin Delay (tpd) — 15 ns
Counter Frequency (fCNT) — 100 MHz
Supply Current (Icc) — 80 mA typical
Dedicated Inputs — 10
Dedicated I/O Pins — 12
Process Technology — CMOS, UV-erasable

Mga Datasheets at Resources

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